Power failure management in disk drives

ABSTRACT

A disk drive is disclosed comprising a disk, a spindle motor operable to rotate the disk, a head actuated over the disk, an interface operable to receive a host supply voltage, and a capacitor. The host supply voltage is used to charge the capacitor to a capacitor voltage higher than the host supply voltage. During a power failure, the host supply voltage stops charging the capacitor, and a motor supply voltage is generated from the spindle motor. The capacitor voltage is used to operate control circuitry, and when the capacitor voltage decays below the motor supply voltage, the motor supply voltage charges the capacitor.

RELATED APPLICATION

This application is a continuation of U.S. patent application Ser. No. 13/316,128, entitled “DISK DRIVE CHARGING CAPACITOR USING MOTOR SUPPLY VOLTAGE DURING POWER FAILURE,” filed Dec. 9, 2011, the disclosure of which is hereby incorporated by reference herein in its entirety.

BACKGROUND

Disk drives comprise a disk and a head connected to a distal end of an actuator arm which is rotated about a pivot by a voice coil motor (VCM) to position the head radially over the disk. The disk comprises a plurality of radially spaced, concentric tracks for recording user data sectors and embedded servo sectors. The embedded servo sectors comprise head positioning information (e.g., a track address) which is read by the head and processed by a servo control system to control the velocity of the actuator arm as it seeks from track to track.

When a power failure occurs, it may be desirable to complete pending write commands prior to safely shutting down the disk drive so that user data is not lost. This is of particular concern in disk drives that cache write data in a volatile semiconductor memory prior to writing the data to the disk or a non-volatile semiconductor memory. A conventional disk drive may charge a capacitor to a high voltage using the power supplied by the host, and then use the capacitor voltage to power circuitry in the disk drive to flush a write cache during a power failure. Using a high voltage capacitor to generate the backup power is more cost effective compared to using a lower voltage capacitor or bank of capacitors.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a disk drive according to an embodiment of the present invention wherein a host supply voltage is boosted to charge a capacitor, and during a power failure, the capacitor is charged with a motor supply voltage when the capacitor voltage decays below the motor supply voltage.

FIG. 2 shows a disk drive according to an embodiment of the present invention wherein a spindle motor is controlled using a second supply voltage.

FIG. 3 shows a disk drive according to an embodiment of the present invention wherein a microactuator is controlled using the boosted voltage.

FIG. 4 shows a disk drive according to an embodiment of the present invention wherein a spindle motor is controlled using a second supply voltage.

FIG. 5 is a graph of the capacitor voltage wherein the motor supply voltage maintains the capacitor voltage above a safe level for a longer period during a power failure according to an embodiment of the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

FIG. 1 shows a disk drive according to an embodiment of the present invention comprising a disk 2, a spindle motor 4 operable to rotate the disk 2, a head 6 actuated over the disk 2, an interface operable to receive a host supply voltage 8, and a capacitor 10. The host supply voltage 8 is used to charge the capacitor 10 to a capacitor voltage 12 higher than the host supply voltage 8. During a power failure, the host supply voltage 8 stops charging the capacitor 10, and a motor supply voltage 14 is generated from the spindle motor 4. The capacitor voltage 12 is used to operate control circuitry 16, and when the capacitor voltage 12 decays below the motor supply voltage 14, the motor supply voltage 14 charges the capacitor 10. In the embodiment of FIG. 1, the disk 2 comprises embedded servo sectors 18 ₀-18 _(N) that define a plurality of servo tracks 20. The control circuitry 16 processes a read signal 22 emanating from the head 6 to demodulate the servo sectors 18 ₀-18 _(N) and generate a position error signal (PES) representing an error between the actual position of the head and a target position relative to a target track. The control circuitry 16 filters the PES using a suitable compensation filter to generate a control signal 24 applied to a voice coil motor (VCM) 26 which rotates an actuator arm 28 about a pivot in order to actuate the head 6 radially over the disk 2 in a direction that reduces the PES. The servo sectors 18 ₀-18 _(N) may comprise any suitable position information, such as a track address for coarse positioning and servo bursts for fine positioning.

The spindle motor 4 shown in FIG. 1 comprises a plurality of windings (e.g., φA, φB, φC) having a first end and a second end, wherein the second ends are connected together at a center tap. A commutation controller 30 commutates the windings over commutation intervals by controlling commutation logic 32. The spindle motor 4 is shown as comprising three windings (φA, φB, φC) corresponding to three phases. However, any suitable number of windings may be employed to implement any suitable multi-phase spindle motor. Further, any suitable commutation sequence may be employed to commutate the windings. For example, the commutation logic 32 may control switches to commutate the windings of the spindle motor 4 in a two-phase, three-phase, or hybrid two-phase/three-phase commutation sequence.

The windings of the spindle motor 4 are connected to a back electromotive force (EMF) detector 34 which detects threshold crossings (e.g., zero crossings) in a back EMF voltage generated by the windings with respect to the center tap. Since the back EMF voltage is distorted when current is flowing, the commutation controller 30 supplies a control signal 36 to the back EMF detector 34 identifying the “open” winding generating a valid back EMF signal. At each back EMF threshold crossing the back EMF detector 34 toggles a signal to generate a square wave signal 38. The frequency of the back EMF threshold crossings and thus the frequency of the square wave signal 38 represent the speed of the spindle motor 4. The commutation controller 30 evaluates the square wave signal 38 and adjusts a control signal 40 applied to the commutation logic 32 in order to control the speed of the spindle motor 4.

If a power failure occurs while the disk is spinning, there is residual kinetic energy as the disk continues to rotate the spindle motor 4, and therefore the spindle motor 4 can be converted into a generator for generating a motor supply voltage 14. A diode 42 disconnects the host supply voltage 8 from the windings of the spindle motor 4 and the motor supply voltage 14. The motor supply voltage 14 may be generated from the back EMF voltage in any suitable manner. In one embodiment, the back EMF voltage may be generated through a synchronous rectification technique wherein the back EMF voltage is rectified to generate the motor supply voltage 14. In another embodiment, a boost/brake technique may be employed which periodically shorts the windings in order to boost the back EMF voltage when generating the motor supply voltage 14. An example embodiment of a boost/brake technique is disclosed in U.S. Pat. No. 6,577,465 entitled “Disk drive comprising spin down circuitry having a programmable signal generator for enhancing power and braking control” the disclosure of which is herein incorporated by reference. In one embodiment, the motor supply voltage 14 may be generated using a combination of techniques, for example, by initially using synchronous rectification and then switching to boost/brake when the motor supply voltage falls below a threshold.

In the embodiment of FIG. 1, the host supply voltage 8 is boosted 44, and the boosted supply voltage 46 is used to charge the capacitor 10 during normal operation (i.e., switch 48 connects the capacitor 10 to the boosted supply voltage 46). During a power failure, switch 48 disconnects the capacitor 10 from the voltage booster 44 and switch 52 disconnects the control circuitry 16 from the host supply voltage 8 and connects the control circuitry 16 to a backup voltage 54 generated by a voltage regulator 56 using the capacitor voltage 12. The backup voltage 54 enables the control circuitry 16 to continue operating during the power failure, for example, to continue writing data to the disk 2 or to a non-volatile semiconductor memory in order to finish the current write operation. When the capacitor voltage 12 decays below the motor supply voltage 14, diode 50 begins conducting so that the motor supply voltage 14 begins charging the capacitor 10. In this manner, the voltage regulator 56 is able to supply the backup voltage 54 to the control circuitry 16 for a longer period to help ensure the disk drive shuts down safely during a power failure.

In one embodiment, the motor supply voltage 14 may be used to power a suitable VCM driver (e.g., an H-bridge driver) within the control circuitry 16 during a power failure, whereas the switching circuitry of the VCM driver may be controlled using the backup voltage 54 generated by the voltage regulator 56. Accordingly in this embodiment, the motor supply voltage 14 may be used immediately during a power failure in order to power the VCM driver, whereas the voltage regulator 56 for supplying the switching circuitry of the VCM driver begins using the motor supply voltage 14 after the capacitor voltage 12 decays below the motor supply voltage 14. In the embodiment of FIG. 1, the disk drive receives a single host supply voltage 8 (e.g., a 5v supply) for powering the spindle motor 4, VCM 26, and control circuitry 16 during normal operation, as well as for charging the capacitor 10 after boosting 44. In another embodiment shown in FIG. 2, the disk drive receives a first host supply voltage 8A (e.g., a 5v supply) for powering the control circuitry 16 and charging the capacitor 10, and a second host supply voltage 8B (e.g., a 12v supply) for powering the spindle motor 4 and VCM 26 during normal operation. During a power failure, a diode 57 disconnects the second host supply voltage 8B from the spindle motor 4 and the VCM 26.

FIG. 3 shows a disk drive according to an embodiment of the present invention comprising a microactuator 58 for actuating the head 6 radially over the disk 2 in fine movements, whereas the VCM 26 actuates the head 6 radially over the disk 2 in coarse movements. Any suitable microactuator 58 may be employed, such as a suitable piezoelectric (PZT) actuator which deflects when modulated with a control voltage. The microactuator 58 may actuate the head 6 in any suitable manner, such as a microactuator 58 that actuates a suspension relative to the actuator arm 28 as shown on FIG. 3. In an alternative embodiment, the microactuator may actuate a head gimbal relative to the suspension. In the embodiment of FIG. 3, the boosted voltage 46 for charging the capacitor 10 is also used to power a microactuator driver 60. During a power failure, a switch 62 disconnects the input of the voltage booster 44 from the supply voltage 8 and connects the input to the backup voltage 54 generated by the voltage regulator 56. In this manner, the voltage booster 44 continues to generate the boosted voltage 46 for powering the microactuator driver 60 during the power failure.

FIG. 4 shows a disk drive according to an embodiment of the present invention that receives a first host supply voltage 8A (e.g., a 5v supply) for powering the control circuitry 16 and charging the capacitor 10, and a second host supply voltage 8B (e.g., a 12v supply) for powering the spindle motor 4 and the VCM 26 during normal operation. During a power failure, the diode 57 disconnects the second host supply voltage 8B from the spindle motor 4 and the VCM 26.

In the embodiments of FIG. 2 and FIG. 4, designing the voltage booster 44 to boost the first host supply voltage 8A may provide a benefit over boosting the second host supply voltage 8B in that the voltage booster 44 may operate at the same input voltage during normal operation as well as during a power failure. That is, in one embodiment the backup voltage 54 generated by the voltage regulator 56 during a power failure may be substantially the same as the first host supply voltage 8A (e.g., 5v supply). Otherwise the voltage booster 44 would need to boost the second host supply voltage 8B (e.g., 12v supply) during normal operation, and then boost the backup voltage 54 during the power failure. Designing the voltage booster 44 to operate at a single input voltage may decrease the cost and complexity of the voltage booster 44.

FIG. 5 is a graph illustrating a benefit of charging the capacitor 10 using the motor supply voltage during a power failure. During normal operation, the capacitor voltage is charged to a high level (e.g., 17v used to power a microactuator). When a power failure occurs, the voltage regulator 56 begins generating the backup voltage 54 using the capacitor voltage 12, thereby causing the capacitor voltage 12 to decay. When the capacitor voltage 12 decays below the motor supply voltage 14, the motor supply voltage 14 begins charging the capacitor 10 which extends the time the capacitor voltage 12 remains above a safe level (a level capable of reliably operating the disk drive). If the motor supply voltage 14 is not used to charge the capacitor 10, the capacitor voltage 12 may fall below the safe level before the disk drive finishes the operations needed to shut down safely.

Any suitable control circuitry may be employed to implement the embodiments of the present invention, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller, or certain steps described above may be performed by a read channel and others by a disk controller. In one embodiment, the read channel and disk controller are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into an SOC.

In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to implement the embodiments described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the disk drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry for configuring the switches during a power failure as described in the above embodiments. In one embodiment, the operating voltage regulator(s) and the backup voltage regulator may be implemented within a power large scale integrated (PLSI) circuit coupled to an SOC, or integrated within an SOC. 

What is claimed is:
 1. A disk drive comprising: a disk; a spindle motor operable to rotate the disk; an interface configured to receive a host supply voltage; a power storage device; and control circuitry configured to: use the host supply voltage to charge the power storage device; and during a power failure: stop charging the power storage device using the host supply voltage; generate a motor supply voltage from the spindle motor; use power from the power storage device to write a first portion of host data associated with a pending write operation to the disk; compare a voltage level of the power storage device to the motor supply voltage to determine when the voltage level of the power storage device becomes less than the motor supply voltage; re-charge the power storage device using the motor supply voltage when it is determined that the voltage level of the power storage device has become less than the motor supply voltage; and write a second portion of the host data to the disk using the re-charged power storage device.
 2. The disk drive of claim 1, wherein the control circuitry is further configured to use the host supply voltage to charge the power storage device to a voltage level higher than the host supply voltage.
 3. The disk drive of claim 1, further comprising voltage boosting circuitry configured to receive the host supply voltage and generate a boosted voltage.
 4. The disk drive of claim 3, wherein the control circuitry is further configured to use the boosted voltage to charge the power storage device.
 5. The disk drive of claim 1, wherein the control circuitry is further configured to stop charging the power storage device using the host supply voltage at least in part by operating a first switch to disconnect the host supply voltage from the power storage device.
 6. The disk drive of claim 5, wherein the control circuitry is further configured to stop charging the power storage device using the host supply voltage at least in part by operating a second switch to disconnect the control circuitry from the host supply voltage and connect the control circuitry to the power storage device.
 7. The disk drive of claim 1, further comprising a diode connected between the motor supply voltage and the power storage device, the diode being configured to compare the motor supply voltage to the voltage level of the power storage device and allow the motor supply voltage to power the power storage device when the motor supply voltage is greater than the voltage level of the power storage device.
 8. The disk drive of claim 7, wherein the diode is forward biased from the motor supply voltage to the power storage device.
 9. The disk drive of claim 1, further comprising a voltage regulator configured to receive backup power from the power storage device and provide the backup power to the control circuitry.
 10. The disk drive of claim 1, wherein the control circuitry is further configured to use the motor supply voltage to power a voice coil motor (VCM) when the voltage level of the power storage device is greater than the motor supply voltage.
 11. A disk drive comprising: a disk; a head configured to write data to the disk; a microactuator configured to actuate the head; an interface operable to receive a host supply voltage; a power storage device configured to store a backup voltage; a voltage booster configured to receive the host supply voltage at an input and generate a boosted host supply voltage; and control circuitry configured to, in response to a power failure event: disconnect the voltage booster input from the host supply voltage and connect the voltage booster input to the backup voltage; generate a boosted backup voltage using the voltage booster; and power the microactuator using the boosted backup voltage.
 12. The disk drive of claim 11, wherein the control circuitry is further configured to power the microactuator using the boosted host supply voltage during normal operation.
 13. The disk drive of claim 11, wherein the microactuator is a piezoelectric microactuator.
 14. The disk drive of claim 11, wherein the control circuitry is further configured to charge the power storage device using the boosted host supply voltage during normal operation.
 15. The disk drive of claim 14, wherein the control circuitry is further configured to charge the power storage device to a voltage level greater than the host supply voltage.
 16. The disk drive of claim 11, further comprising a first switch configured to selectively connect the voltage booster input to the host supply voltage or the backup voltage, wherein the control circuitry is further configured to disconnect the voltage booster input from the host supply voltage and connect the voltage booster input to the backup voltage at least in part by operating the first switch.
 17. The disk drive of claim 16, further comprising a second switch configured to selectively connect the control circuitry to the host supply voltage or the backup voltage, wherein the control circuitry is further configured to, in response to the power failure event, disconnect the control circuitry from the host supply voltage and connect the control circuitry to the backup voltage by operating the second switch.
 18. The disk drive of claim 11, further comprising a diode connected between a motor supply voltage and the power storage device.
 19. The disk drive of claim 18, wherein the diode is configured to allow the motor supply voltage to charge the power storage device when the motor supply voltage is greater than a voltage level of the power storage device.
 20. A device comprising: control circuitry configured to: use a host supply voltage received via an interface to charge a power storage device; and during a power failure: stop charging the power storage device using the host supply voltage; generate a motor supply voltage from a spindle motor operable to rotate a disk; use power from the power storage device to write a first portion of host data associated with a pending write operation to the disk; compare a voltage level of the power storage device to the motor supply voltage to determine when the voltage level of the power storage device becomes less than the motor supply voltage; re-charge the power storage device using the motor supply voltage when it is determined that the voltage level of the power storage device has become less than the motor supply voltage; and write a second portion of the host data to the disk using the re-charged power storage device.
 21. The device of claim 20, wherein the control circuitry is further configured to use the host supply voltage to charge the power storage device to a voltage level higher than the host supply voltage.
 22. The device of claim 20, further comprising voltage boosting circuitry configured to receive the host supply voltage and generate a boosted voltage.
 23. The device of claim 22, wherein the control circuitry is further configured to use the boosted voltage to charge the power storage device.
 24. The device of claim 20, wherein the control circuitry is further configured to stop charging the power storage device using the host supply voltage at least in part by operating a first switch to disconnect the host supply voltage from the power storage device.
 25. The device of claim 24, wherein the control circuitry is further configured to stop charging the power storage device using the host supply voltage at least in part by operating a second switch to disconnect the control circuitry from the host supply voltage and connect the control circuitry to the power storage device.
 26. The device of claim 20, further comprising a diode connected between the motor supply voltage and the power storage device, the diode being configured to compare the motor supply voltage to the voltage level of the power storage device and allow the motor supply voltage to power the power storage device when the motor supply voltage is greater than the voltage level of the power storage device.
 27. The device of claim 26, wherein the diode is forward biased from the motor supply voltage to the power storage device.
 28. The device of claim 20, further comprising a voltage regulator configured to receive backup power from the power storage device and provide the backup power to the control circuitry.
 29. The device of claim 20, wherein the control circuitry is further configured to use the motor supply voltage to power a voice coil motor (VCM) when the voltage level of the power storage device is greater than the motor supply voltage. 